Electronic devices such as mobile telephones are generally provided with circuits each realizing various functions with an AC (alternating current) signal with supply of a power from a DC (direct current) power supply. Such a circuit operates under such an assumption that a reference electric potential of a specified portion is constant, and performs transmission, amplification and so on of signals by adding the AC signal to the reference electric potential. Accordingly, when an unexpected noise is superimposed on the reference electric potential, the operations of the circuit become unstable. Such a method (See Patent Document 1, for example) is known for suppressing fluctuations of the reference electric potential that a positive phase output and a negative phase output are generated by an operational amplifier and superimposed on the reference electric potential.
In addition, a semiconductor integrated circuit apparatus is disclosed which can reduce crosstalk due to induction without arranging many extra circuit elements (See Patent Document 2, for example). In the semiconductor integrated circuit apparatus, a plurality of parallel wiring portions are formed in a part of a signal path so that directions of signal flowing through the parallel wiring portions are mutually reversed. Each of the parallel wiring portion does not include any inverters at the halfway thereof, and the portion is a part of a real wiring, and therefore, it is not necessary to employ any extra circuit elements. When a signal is transmitted from one end the parallel wiring portion, the signal is folded back partway and the signal propagation direction is reversed at the portion. When the directions of currents flowing through the parallel conductors are reversed to each other, magnetic fields in different directions are canceled due to the nature of electromagnetism, and the generation of electromagnetic waves is suppressed. The parallel wiring portions can ease and further suppress the crosstalk with the other neighborhood wiring.
Patent Document 1: Japanese patent laid-open publication No. JP-59-107615-A.
Patent Document 2: Japanese patent laid-open publication No. JP-2003-158238-A.